Integrated circuits are found in a variety of electronic and computer products. Integrated circuits are interconnected networks of electrical components formed on a common foundation or substrate. Manufacturers typically use techniques such as layering, doping, masking, and etching to build thousands and even millions of microscopic resistors, transistors, and other electrical components on a silicon wafer. These components are then wired, or interconnected, together to form a specific electric circuit, for example, a computer memory.
Typically, the components are covered with an insulating layer of silicon dioxide. Then, small holes are etched in the insulating layer to expose portions of the components underneath. Trenches are then dug in the layer to define a wiring pattern. Thus, millions of microscopic components are interconnected. Then, through metallization, the holes and trenches are filled to form sub-micron diameter wires between the components.
The semiconductor industry uses a damascene or dual damascene process to form the interconnects. The damascene process involves forming relief patterns in a dielectric layer (etching), filling the resulting pattern with interconnect metal, then polishing away the excess metal on the wafer surface and leaving inlaid interconnect metal features.
In each manufacturing step, it is often necessary or desirable to modify or refine an exposed surface of the wafer to prepare the wafer for subsequent manufacturing steps. There are several known polishing processes: chemical mechanical polishing (CMP), electrochemical mechanical deposition (ECMD), and chemical enhanced polishing (CEP), are examples. In addition, wafer cleaning is typically used. Each of these processes uses an aqueous acidic or basic solution or slurry. These solutions or slurries have been comprised of basic solutions for polishing the silicon dioxide interdielectric, and acidic solutions for polishing the conductive copper interconnect. Non-uniform polishing leading to dishing (or films that are not flat) is one challenge encountered during planarization. Other challenges include avoiding scratches on the surface of the flat films, and removing particles, residues, and metal ions leftover from the planarization process.
Aluminum has traditionally been used as the conductive interconnect material. In making high performance microprocessor chips, however, copper is now often used as an interconnect material. Copper is often preferred because of its low electrical resistivity, and its low resistance-capacitance (RC) time delays in the metal interconnect that limit the performance of high-speed logic chips.
Thus, the need exists for methods of polishing and/or cleaning copper interconnects and/or film that use a solution or a slurry having an acidic nature that effectively dissolves and/or removes copper or copper oxide. Additionally, the need exists for methods of polishing and/or cleaning copper interconnects and/or film that have an etch rate that enables better control of deposition and/or cleaning, particularly on very thin seed layers.